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| Part Number: | 74LVC2G126DC |
|---|---|
| Manufacturer/Brand: | NXP |
| Part of Description: | 74LVC2G126DC NXP |
| Datasheets: | None |
| RoHs Status: | Lead free / RoHs compliant |
| Payment: | PayPal / Credit Card / T/T |
| Shipment Way: | DHL / Fedex / TNT / UPS / EMS |
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Ship From: Hong Kong
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| Product Attribute | Attribute Value |
|---|---|
| Series | - |
| RoHs Status | Lead free / RoHS Compliant |
| Condtion | New Original Stock |
| Warranty | 100% Perfect Functions |
| Lead Time | 2-3days after payment. |
| Product Attribute | Attribute Value |
|---|---|
| Payment | PayPal / Credit Card / Telegraphic Transfer |
| Shipping by | DHL / Fedex / UPS |
| Port | HongKong |
| RFQ Email | Info@Y-IC.com |




74LVC2G126DC
Freescale / NXP Semiconductors. Y-IC is a quality distributor for this brand and we will provide you with the best products and services.
Dual non-inverting buffer/line driver with 3‑state (high‑impedance) outputs and independent enables. Belongs to the 74LVC low‑voltage CMOS logic family. Operates from a low supply while tolerating higher input levels. Ideal for bus isolation, signal gating, and general-purpose buffering. Housed in a compact VSSOP-8 package. Current available stock: 6100 units.
Function: 2 independent non-inverting buffers with active‑HIGH output enable (OE)
Three-state outputs: allows bus sharing and isolation
Wide supply range for LVC: supports low-voltage operation (typical LVC family)
5 V tolerant inputs/outputs when powered at lower VCC (typical for LVC family; check datasheet for exact limits)
Fast switching and low propagation delay for high-speed digital lines
Low static power: CMOS inputs with very low ICC when inputs are not floating
Robust ESD protection on I/O pins (see datasheet levels)
Pin-to-pin compatible with industry-standard 74LVC2G126 across vendors
Simple way to gate or isolate two signals independently using one small IC
High-speed operation with clean edges for reliable digital timing
5 V tolerant I/Os (when powered lower) ease mixed-voltage interfacing
Tiny 8‑pin VSSOP saves PCB area and simplifies routing
Low power consumption reduces heat and extends battery life in portable designs
Broad ecosystem and multi-vendor second sourcing reduces supply risk
Type: VSSOP-8 (very thin shrink small-outline), 8 leads, gull-wing
Case code: 1021 (as provided)
Material: Molded epoxy plastic body, tin-plated copper alloy leads (RoHS-compliant; verify finish in datasheet)
Approximate size: compact 8‑pin small-outline footprint suitable for dense layouts (typical VSSOP body ~3 x 3 mm with fine lead pitch; check datasheet for exact dimensions and land pattern)
Pin configuration (typical for 74LVC2G126): two data inputs (A1, A2), two outputs (Y1, Y2), two enables (OE1, OE2), VCC, GND
Thermal characteristics: small-body package with moderate thermal resistance; ensure adequate copper for heat spreading and follow datasheet derating
Electrical properties (family typicals; confirm in datasheet):
- Supply: low-voltage CMOS operation (LVC family)
- I/O tolerance: inputs/outputs tolerant to higher logic levels when VCC is lower
- Output drive: strong CMOS drive suitable for most logic loads
- Propagation delay: fast, suitable for high-speed digital lines
Status: Active in mass production by NXP’s standard logic lineage (often also supplied under Nexperia branding for logic devices)
Not nearing discontinuation based on industry status of 74LVC family
Equivalent or alternative models (verify pinout, drive strength, and electrical limits against your design):
- Texas Instruments SN74LVC2G126 (available in VSSOP/TSSOP and other small packages)
- Nexperia 74LVC2G126 (e.g., package variants GW/DC; same function and family)
- ON Semiconductor / onsemi NC7WZ126 (dual non-inverting buffer with 3‑state outputs; different logic family, check specs)
- Diodes Incorporated 74LVC2G126 (family-compatible alternative)
- Fairchild/ON NC7SZ126 or SN74LVC1G126 (single‑gate versions if only one channel is needed)
If your application demands exact mechanical/package match or specific electrical margins, please contact our sales team via the Y-IC website for detailed cross-reference support.
MCU/SoC GPIO buffering and fan‑out
Bus isolation and multiplexed bus sharing
Enable/disable control for peripherals and transceivers
Power‑up sequencing and signal gating to avoid bus contention
Clock or control line gating (non-inverting) with tri‑state control
Level‑tolerant interfacing between mixed-voltage logic domains (per LVC limits)
Portable and space‑constrained electronics requiring small, low‑power logic
Y-IC hosts the most authoritative datasheet for this product model on our website. For exact electrical limits, timing, package dimensions, land pattern, and qualification data, download the datasheet directly from this page for the latest, official specifications.
Inventory is available. Get a Quote on Y-IC now for pricing and lead time. Learn More about volume discounts and logistics support on the product page. Limited Time Offer for fast‑turn orders—send your RFQ today to secure supply.
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74LVC2G126DCNXP |
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