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| Part Number: | 74LVC2G02DC,125 |
|---|---|
| Manufacturer/Brand: | Nexperia |
| Part of Description: | IC GATE NOR 2CH 2-INP 8VSSOP |
| Datasheets: |
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| RoHs Status: | ROHS3 Compliant |
| Payment: | PayPal / Credit Card / T/T |
| Shipment Way: | DHL / Fedex / TNT / UPS / EMS |
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Ship From: Hong Kong
| Quantity | Unit Price |
|---|---|
| 1+ | $0.2106 |
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| Product Attribute | Attribute Value |
|---|---|
| Voltage - Supply | 1.65V ~ 5.5V |
| Supplier Device Package | 8-VSSOP |
| Series | 74LVC |
| Package / Case | 8-VFSOP (0.091', 2.30mm Width) |
| Package | Tape & Reel (TR) |
| Operating Temperature | -40°C ~ 125°C |
| Number of Inputs | 2 |
| Number of Circuits | 2 |
| Mounting Type | Surface Mount |
| Product Attribute | Attribute Value |
|---|---|
| Max Propagation Delay @ V, Max CL | 4.3ns @ 5V, 50pF |
| Logic Type | NOR Gate |
| Input Logic Level - Low | 0.7V ~ 0.8V |
| Input Logic Level - High | 1.7V ~ 2V |
| Features | - |
| Current - Quiescent (Max) | 4 µA |
| Current - Output High, Low | 32mA, 32mA |
| Base Product Number | 74LVC2G02 |




The 74LVC2G02DC,125 from Nexperia is a compact dual 2-input NOR gate integrated circuit designed to bridge the gap between differing logic voltage levels. It integrates two independent 2-input NOR gates within an 8-lead VSSOP package, enabling logic operations fundamental to digital circuit design. Supporting input signals from 1.65 V up to 5.5 V, this product is ideal for mixed-voltage environments commonly found in modern electronic systems, including mixed 3.3 V and 5 V logic domains. The device is engineered with special input protection, allowing direct interfacing without additional level-shifting components.
The 74LVC2G02DC,125 offers a wide supply voltage range (1.65 V to 5.5 V) and 5 V tolerant outputs, making it suitable for long-term use in systems requiring backward compatibility with legacy 5 V logic circuitry. Its Schmitt-trigger inputs improve noise immunity and enable reliable switching with slower or distorted input signals. The device exhibits CMOS low power consumption and features ±24 mA output drive capability at 3.0 V, addressing the need for driving moderate loads. The integrated $ I_{OFF} $ circuitry prevents backflow current during partial power-down modes, protecting system integrity. Also notable is its compliance with JEDEC voltage standards from 1.65 V to 3.6 V, certified ESD protection (HBM up to 2 kV and CDM up to 1 kV), and robust latch-up immunity exceeding 250 mA, all ensuring durability and reliability in complex industrial applications.
The device implements the NOR logic function where the output is high only when all inputs are low, otherwise the output remains low. This NOR gate is fundamental for creating more complex logic structures and is widely applicable in combinational logic designs. The Schmitt-trigger input stage provides hysteresis, enhancing signal integrity by ignoring small fluctuations in input voltage. The device’s functional table clearly outlines logic HIGH (H) and LOW (L) input states and resulting outputs, crucial for designing predictable digital architectures. Furthermore, the dual-channel structure allows for space-saving double gate implementation within one package, benefiting dense PCB layouts.
This NOR gate comes in several package variants including TSSOP8 (Thin Shrink Small Outline Package), VSSOP8 (Very Small Outline Package), and various XSON8 forms—all featuring 8 leads. The pin configuration designates two pairs of inputs and corresponding outputs along with power supply (VCC) and ground (GND) pins. Pin 1 is distinctly marked for orientation during PCB assembly. Understanding the pinout is essential for seamless integration into system schematics and physical board layouts. The choice between packages offers flexibility depending on thermal dissipation needs, assembly constraints, and space limitations.
Under recommended conditions, the 74LVC2G02DC,125’s static electrical parameters include input voltage thresholds, output voltage levels, leakage currents, and power consumption figures exhibited over a temperature range from –40 °C to +125 °C. Dynamic parameters include propagation delays (t_PLH, t_PHL), which define the switching speed critical in timing-sensitive circuits. The device demonstrates typical propagation delays in the low nanosecond range at nominal supply voltages, suitable for moderate to high-speed applications. Output capacitances and power dissipation figures provided allow engineers to estimate energy budgets within their designs accurately, considering input switching frequencies and load capacitances.
The device is rated for operation from –40 °C to +125 °C, encompassing industrial temperature standards. Supply voltage operation between 1.65 V and 5.5 V supports a wide range of modern microcontrollers, FPGAs, and discrete logic configurations. The device’s overvoltage tolerance on inputs up to 5.5 V safeguards it against unexpected voltage surges, avoiding input damage. Moisture Sensitivity Level 1 ensures no special storage or handling precautions are necessary, streamlining manufacturing workflows.
A key feature is the integrated $ I_{OFF} $ circuitry that disables outputs during partial or complete power-down states, eliminating backflow currents that might damage the devices or interfere with system operation. This allows the 74LVC2G02DC,125 to be used in low-power or battery-powered systems with complex power management strategies. Engineers designing power sequenced or multi-voltage domain systems will find this feature invaluable for maintaining component safety and system robustness during various power states.
In practical engineering scenarios, the 74LVC2G02DC,125 serves as a versatile logic element in interface circuits between 3.3 V and 5 V logic domains in embedded systems, communication equipment, and data acquisition modules. Its noise immunity and fast switching suit it for industrial automation and control applications. When integrating, care should be taken in PCB layout to minimize crosstalk and maintain signal integrity. Selection of the appropriate package variant is crucial based on board space constraints and thermal dissipation requirements. The dual gate approach optimizes design space without compromising logic function availability.
Engineers evaluating alternatives might consider other devices within the 74LVC logic family or equivalents from competing manufacturers offering similar voltage tolerances, pinouts, and logic functions. When selecting replacements, verification of input overvoltage tolerance, power consumption, output drive strength, and switching speeds is essential to maintain system behavior. Cross-reference databases and JEDEC compliance identifiers help identify compatible substitutes that meet the same industrial and environmental requirements, while package form factor compatibility is a critical factor in seamless hardware migration.
and selection guidance for engineers
The Nexperia 74LVC2G02DC,125 dual 2-input NOR gate integrates robust voltage tolerance, fast switching, low power consumption, and power-down safety features, making it an excellent choice for engineers working on mixed-voltage logic systems. Its adherence to JEDEC standards and multiple package options ease design adoption across a variety of applications. Considering all electrical and environmental specifications alongside system requirements ensures optimal device choice, contributing to enhanced system reliability and performance in digital logic circuits.
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74LVC2G02DC,125Nexperia USA Inc. |
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