Intel EPM570F256C5TT

Mfr. Part

EPM570F256C5TT

Manufacturer

Intel

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Detailed Description

MAX II family CPLD with 570 logic elements (LEs), 440 macrocells, and 160 user I/Os in a 256‑FBGA (17 x 17 mm) package. In-system programmable via JTAG. Flash-based, non-volatile architecture for instant-on operation and no external configuration memory. Commercial temperature range 0°C to 85°C (TJ). Typical propagation delay tPD up to 8.7 ns. Internal supply options 2.375–2.625 V and 3.0–3.6 V. Surface-mount, tray packaging. Ideal for glue logic, interface bridging, and control/state-machine tasks.

Key Features

MAX II series CPLD

570 logic elements (LEs), 440 macrocells

160 user I/Os

256‑FBGA (17 x 17 mm) package

In-system programmable (ISP) over JTAG

Non-volatile, instant-on configuration

tPD (max) 8.7 ns

Internal supply ranges: 2.375–2.625 V and 3.0–3.6 V

Operating temperature: 0°C to 85°C (TJ)

Surface-mount assembly

Tray packaging

Key Advantages

No external configuration memory needed (fast power-up, simpler BOM)

Stable, non-volatile configuration (retains design without power)

Low power vs. many SRAM-FPGA solutions in similar roles

High I/O count in a compact 17 x 17 mm FBGA footprint

Mature toolchain and broad ecosystem support

ISP simplifies updates and field reprogramming

Packaging

Type: 256‑FBGA, surface mount

Body size: 17 mm x 17 mm (supplier device package 256‑FBGA 17x17)

Ball count: 256

Pin configuration: Up to 160 user I/O balls; distributed power/ground; dedicated JTAG pins (see datasheet for full ball map and bank assignments)

Material: Lead-free, RoHS-compliant FBGA (industry-standard organic substrate and epoxy mold compounds)

Delivery format: Tray

Thermal characteristics: Operating junction 0°C to 85°C (TJ). For θJA/θJC and detailed derating, see datasheet (values depend on board design and airflow)

Electrical properties (high level): Internal supply 2.375–2.625 V or 3.0–3.6 V, tPD up to 8.7 ns, ISP over JTAG. For I/O standards, drive strength, and bank voltages, see datasheet

Lifecycle

Status: Active in many channels as a mature MAX II device. Not announced as EOL at the time of writing, but lead times may vary by package and speed grade

Pin-compatible or close variants (same family, check exact pinout/speed/temperature):

- EPM570F256C5N (same density/package, RoHS lead-free marking variant)

- EPM570F256C4N, EPM570F256C3N (faster speed grades in same package)

- EPM570F256I5N (industrial temp range in same package)

Same family, different packages (not pin-compatible; redesign required):

- EPM570T144C5N (TQFP-144)

- EPM570GT100C5N or other BGA/TQFP options depending on availability

Newer-generation alternatives (not pin-compatible; migration/redesign required):

- Intel MAX V family around 5M570 density (for example 5M570Z in FBGA or 5M570T in TQFP, package/speed/temp to be selected per design)

- Intel MAX 10 low-density devices for CPLD-class functions (package, logic, and I/O differ)

If you need a drop-in equivalent and the above do not meet your constraints, please contact our sales team via the Y-IC website for the latest compatible options and supply status.

Key Application Areas

Glue logic and bus interface bridging

Power sequencing and reset/enable control

Finite state machines and control plane logic

I/O expansion, GPIO aggregation, and simple level adaptation

Legacy bus translation and timing adjustment

LED/keypad/indicator control

Simple serial protocol bridging (SPI/I2C/UART helpers)

Board test access and system bring-up via JTAG-controlled logic

Industrial, networking, communications, consumer, and embedded control designs

Datasheet

Y-IC hosts the most authoritative datasheet for this exact model on our product page. For accurate pin maps, timing, electrical limits, thermal data, programming, and migration notes, download the datasheet on this page now.

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